Hardware - Verification Engineer Internship
Pleasanton, California (Hybrid)
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About the Role
- Define, document, develop and execute RTL verification test/coverage at both block and system level
- Triage regressions and debug RTL designs in Verilog, SystemVerilog and Chisel
- Help improve and refine verification process, methodology and metrics
- Build performance verification and power-aware verification
- Work closely with designers, micro architects and firmware to resolve issues
Minimum qualifications
- Bachelor's degree in Electrical Engineering, Computer Science or other technically related fields.
- Experience with HDL (SystemVerilog and Verilog)
- Hands on experience in constrained random verification
- Great communication skills to present the work and gather feedback from engineers
Preferred qualifications
- Bachelor’s degree in Electrical Engineering, Computer Science or other technically related fields.
- In-depth knowledge of UVM methodology, coverage, and design verification flow
- Good Python programming skill is strongly preferred
- Experience with verifying AI chips is a plus
- Experience with Chisel is a plus