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Is Furiosa’s chip architecture actually innovative? Or just a fancy systolic array?

Technical Updates

November 18, 2024

Systolic array vs TCP hero

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Tech giants begin RNGD sampling

October 21, 2024

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Press Release: FuriosaAI Ends 2024 on a High Note: Llama 3.1 Performance, SDK Release, Leadership Expansion

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Why we’re joining the UEC: The future of LLM inference is multi-chip

News
December 02, 2024
Gartner report mentions FuriosaAI as Sample Vendor, highlights need for power-efficient AI chips

News
November 14, 2024
Tech giants begin RNGD sampling

News
October 21, 2024
FuriosaAI unveils RNGD at Hot Chips 2024

News
August 26, 2024
World's first NPU Hackathon for Vision Applications with Furiosa's Gen 1 Vision NPU

News
April 30, 2024
A new global survey of businesses’ AI Infra Plans, conducted by FuriosaAI, ClearML and AIIA

News
March 13, 2024
Dudaji Uses FuriosaAI's Gen 1 Vision NPU to monitor workplace safety

News
February 27, 2024
Press Release: FuriosaAI Ends 2024 on a High Note: Llama 3.1 Performance, SDK Release, Leadership Expansion

News
Press Release: FuriosaAI Unveils RNGD, A Leading AI Inference Chip

News
FuriosaAI showcases Gen 1 NPU at CVPR 2023 with live demo

News
June 27, 2023

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