Hardware - High-Speed IO IP Design Engineer
Seoul, South Korea (Global Remote Available) (On-site)
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Responsibilities
- Design High-Speed Interface Controller IP
- Test, Performance analysis in IP/chiptop level (bus, memory bandwidth) simulation
- Test, Debugging & Troubleshooting of Silicon
Minimum Qualifications
- Good knowledge and understanding in Interface protocol (e.g bus or high-speed interface with flow control, retransmission scheme, etc.)
- Experience in RTL design and logic synthesis, verification, timing closure
- Good knowledge and experience of buffer, CDC design required for Interface Design.
Preferred Qualifications
- Excellent understanding in High-Speed Interface standard specifications (e.g PCIe, LPDDR, HBM, Ethernet or UCIe, etc.)
- High understanding of High-Speed interface technology e.g. SERDES, Channel encoding, OSI-7 layer, Equalization, etc.